Selective phase angle pulse-generating circuit

ABSTRACT

The present disclosure relates to circuitry for generating output pulses at a selected phase angle with respect to an alternating signal, such as a sinusoid, independent of the amplitude and frequency thereof and wherein the alternating signal may vary over a wide range of amplitudes and frequencies. The pulse-generating circuit is ideally adapted for use in induction heating apparatus of the type which employs an inverter drive including controlled switching devices for supplying an alternating signal to a tuned load including an induction heating coil. The circuit is operative to generate the output pulses by detecting, through peak detection for example, the substantial peak of the alternating signal and comparing a selected portion of the peak value with the instantaneous value of the alternating signal. The comparison is made in a comparison stage, including for example an active device such as a transistor or plurality of transistors, with operating power for the comparison stage being supplied from a separate power supply independent of the alternating signal. An output pulse at the selected phase angle is provided when the compared signals bear a predetermined relationship with respect to each other.

United States Patent [72] Inventors PeterWood;

John Rosa, Pittsburgh, Pa.

[21 Appl. No. 709,634

[22] Filed Mar. l, 1968 [45] Patented .Ian. 26, 1971 [73] AssigneeWestinghouse Electric Corporation Pittsburgh, Pa. a corporation ofPennsylvania [54] SELECTIVE PHASE ANGLE PULSE-GENERATING 310,262;328/147, 1451151369}219/1015. 10.77, (lnquired); 329/(lnquired) OTHERREFERENCES Primary Examiner-John S. Heyman Attorneys-F. H. Henson, C. F.Renz and A. S. Oddi ABSTRACT: The present disclosure relates tocircuitry for generating output pulses at a selected phase angle withrespect to an alternating signal, such as a sinusoid, independent of theamplitude and frequency thereof and wherein the alternating signal mayvary over a wide range of amplitudes and frequencies. Thepulse-generating circuit is ideally adapted for use in induction heatingapparatus of the type which employs an inverter drive includingcontrolled switching devices for supplying an alternating signal to atuned load including an induction heating coil. The circuit is operativeto generate the output pulses by detecting, through peak detection forexample, the substantial peak of the alternating signal and comparing aselected portion of-the peak value with the instantaneous value of thealternating signal. The comparison is made in a [56] References Citedcomparison stage, including for example an active device such UNITEDSTATES PATENTS a a transistor or plurality of transistors, withoperating power 2,700,093 1/ 1955 Gordon 219/ 10.77 for the comparisonstage being supplied from a separate 2,945,l l2 7/1960 Scott 219/1037power supply independent of the alternating signal. An output 3,315,1694/1967 Nitta et al. 307/232X pulse at the selected phase angle isprovided when the com- 3,348,l29 10/1967 Schonholzer 307/262X paredsignals bear a predetermined relationship with respect 3,376,514 4/1968Womack et a1 307/232X to each other.

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s2 DRIVER Ll SI "l'l DRIVER s5 DRIVER 0c s4 1 l DRIVER v FZ/ -Fl T2 FLIPFLOP '-F POWER SUPPLY Vb V'bl m I-'-6l |-e2 wamrsssss: P QNVEVNTCIJjRg887 O0 zzbzw WM John Rosa yam l ma SELECTIVE PHASE ANGLEPULSE-GENERATING CIRCUIT C ROSS-REFERENC E TO RELATED APPLICATIONS Thepresent application is an improvement on copending application Ser. No.705,48l filed Feb. I4, 1968 by Peter Wood.

BACKGROUND OF THE INVENTION The present invention relates topulse-generating circuitry and, more particularly, to such circuitry forgenerating pulses at a selected phase angle with respect to analternating signal which may vary in frequency and amplitude over wideranges.

In the cited copending application pulse-generating circuitry isdescribed wherein output pulses are generated at a fixed phase anglewith respect to eachhalf cycle of an alternating waveform such asasinusoid. Suchcircuitry finds ideal application in industrialheatingapparatus employing an inverter drive utilizing controlledswitching devices for supplying the alternating waveform to a tuned loadcomprising an induction heating coil and aparallel connected capacitor.The output pulses are generated at a fixed phase angle by comparing asignal proportional to the peak amplitude of the sinusoidal wavefonnwith the instantaneous value of the waveform through use of asemiconductor device such as a unijunction transistor. When the comparedsignals reach a predetermined relationship, e.g. the standoff ratio ofthe unijunction transistor, a gating pulse is generated. Since the ratioof the instantaneous value of thesinusoidal waveform to its peak valueis a constant, the output pulse will occur at a fixed phase angle withrespect to the sensed half cycle of the alternating waveform. The outputpulses generated are util' ized to supply gating pulses for thecontrolled switching devices of the inverter and thereby control thefrequency of operation and of the inverter. By maintaining the phaseangle constant with respect to each half cycle of the alternatingwaveform at which the controlled devices are activated, the

output voltage across the tuned load may be maintained substantiallyconstant as desired for the controlled heating of the workpiece heatedin the induction heating coil.

The circuitry described in the copending application is operative toprovide the pulses at a fixed phase angle independent of amplitude andfrequency of the sinusoidal waveform within certain limits. However, dueto the application of the instantaneous value of the alternatingwaveform to the semiconductor device, themaximum amplitude limits of thealternating voltage are limited to the maximum voltage rating of theparticular device utilized, for example, the maximum interbase voltageif a unijunction transistor is utilized as the comparison device. Thislimitsthe maximum to minimum amplitude range of the alternating voltagesthat can be sensed by the circuit in that the lower amplitudelimit isfixed to a value where the forward drop of the peak detector diode ofthe pulse generating circuit becomes an appreciable fraction of thesensed alternating voltage. It would therefore be highly desirable if apulse generating circuit could be provided wherein the amplituderangecould be increased by a substantial factor to for exampleat leastI00: 1

SUMMARY OF THE INVENTION Thepresent invention provides new and improvedpulsegenerating circuitry for generating a pulse at a selected phaseangle with. respect to an. alternating waveform; by the comparison ofthe instantaneous value of the waveform with a signal proportional tothepeak magnitude of the alternating waveform. Thecomp arison is madeina comparison stage which is supplied with operating voltage from asource independent of the alternating waveform thereby isolating thecomparison. stagefrom the amplitude of the alternating waveform. Theoutput pulses are thereby. generated at the selected phase angle over awide range of variations in the amplitude of the altematingwaveformBRIEF DESCRIPTION OF THE DRAWING FIG. I is a schematic block diagram ofthe pulse-generating circuit of the present invention incorporated intoinduction 5 heating apparatus; and

FIG. 2 is a waveform diagram including curves A, B, C and D which areutilized in explaining the operation of FIG. I. DESCRIPTION OF THEPREFERRED EMBODIMENT In FIG. I induction heating apparatus is shownutilizing an inverter drive for supplying a parallel tuned load Zincluding aninduction heating coil Lz and a capacitor'Cz connected inparallel circuit relationship therewith. In order to heat a workpiece,itis placed in the magnetic field of the induction heating coilLz forinducing eddy currents therein as is well known in the induction heatingart. The tuned resonant frequency of S3 and S4 arranged in a two-legbridge array. The controlled switching devices may for example comprisesilicon-controlled rectifiers or other equivalent devices. Thecontrolled switching devices SI and S2 are connected in the first leg ofthe bridge, with a junction Jl being formed therebetween at the cathodeanode junction thereof. Devices S3 and S4 are connected in the secondleg of the bridge array, with the junction J2 being formed at thecathode anode junction thereof. The load 2 is connected between thejunctions J 1 and J2 with the two legs of the bridge. The inverter isprovided with a DC supply voltage E which is supplied between a pair ofterminals TI and T2 with the terminal Tl being positive. Between theterminal T1 and the anode electrode of the controlled rectifiers S1 andS3, which are commonly connected, is connected a ballast inductor L1.The cathode electrodes of the devices S2 and S4 are commonly connectedto the terminal T2. Bidirectional current is supplied through the load 2by the selective switching of alternate pairs of the controlledrectifiers. That is, during the first half cycle the controlledrectifier pair S1S4 is gated on while the controlled rectifier pair S2S3is commutated off; and then during the next half cycle, the controlledrectifier pair 52-83 is gated on and the controlled rectifier pair SlS4is turned off. The commutation of a pair of controlled rectifiers iseffected via the load capacitor Cz reverse biasing that pair once theother pair of controlled rectifiers is turned on. The reverse biasing ofthe previously conductive pair of devices turns them off and resets theinverter for the next cycle of operation. The ballast inductor L1 inseries with the respective pairs of controlled rectifier 0 devices actsas a current limiting coil, aids in supplying a substantially constantcurve to the load 2 and smooths out any sudden current excursions due tothe switching action of the controlled devices. The operation of theinverter is such that a substantially constant current, the magnitude ofwhich is determined by the source voltage B and the effective loadresistance in parallel with C2 and Lz, is switched into the paralleltuned circuit Lz-Cz'in opposite directions during altemate half cycles.Thus, with a square wave of current being switched into the tuned load,a sinusoidal voltage Va is developed thereacross which is shown as thevoltage waveform Va in curve A of FIG. 2.

The instantaneous value of this voltage Va may be defined by theequation:

Va V'a sin 0 value V'a is taken, we find:

It can thus be seen that the ratio of the voltage Va at a given phaseangleO to the peak voltage V'a of the sine wave is not a function ofeither amplitude or frequency of the sine wave. Therefore, by thecomparison of the instantaneous value of the sine wave with its peakvalue, an indication can be obtained when this ratio reaches apredetermined value which will be indicative of a predetermined phaseangle. In other words, when the ratio of the instantaneous to peakvoltage is a given value, independent of amplitude of frequency of thesinusoid, the waveform will be at a predetermined phase ang Thecircuitry as shown in FIG. 1 uses this concept for providing an outputpulse whenever the ratio of instantaneous to peak value of the sine wavereaches a desired value. The output pulses thus generated are indicativeof a selected phase angle delay with respect to the particular halfcycle of the sine wave being sensed independent of the amplitude andfrequency of the half cycle sensed.

It should be understood that the wave shape Va may not be exactly asinusoid, but, due to the finite switching times of the controlledrectifiers S1, S2, S3 and S4 and being gated on and commutated off, thewave shape may differ somewhat from a pure sinusoid. However, this doesnot substantially effect the operations circuitry as discussed herein.

The waveform Va as shown in curve A of FIG. 2 is applied to the primarywinding W1 of a sensing transformer TR. The transformer TR has asecondary winding W2 with the respective ends thereof connected at theinput of a full wave bridge including diodes D1, D2, D3 and D4 betweenthe anodecathode junctions of the diodes Dl-D3 and D2D4, respectively.The cathodes of the diodes D1 and D2 are commonly connected at a pointB, and the anodes of the diodes D3 and D4 are commonly connected at apoint G, so that a full wave rectified output voltage Vb is developedbetween the points B and G. The full wave rectified output voltage ofthe diode bridge is shown as the voltage waveform Vb in curve B of FIG.2.

The voltage Vb is applied across a potentiometer P1 which includes aresistive section RI between the point B and the slider thereon andresistive section R2 between the slider and the point G. The voltageappearing across the resistor R2 may be selected by adjusting the sliderto the desired ratio of R22RI R2. The fraction of the total voltage Vbwhich appears across the resistive section R2 is utilized to select thephase angle delay at which output pulses are generated in thepulse-generating circuit as will presently be discussed.

A peak detector including a diode D5 and a capacitor C1 is provided forpeak detecting the voltage developed across the resistive section R2.The anode of the diode D5 is connected to the slider on thepotentiometer P1, with the capacitor C1 being connected between thecathode of the diode D5 at a point C and the point G. A peak detectedsignal voltage Vc is developed across the capacitor C 1 between thepoints C and G as shown in FIG, I. The waveform of the voltage Va isshown in curve C of FIG. 2. Thus, as can be seen by comparing curves 8and C of FIG. 2, the voltage Vc follows the instantaneous value of thevoltage Vb until the peak of the wavefonn Vb at 90. The peak value We ofthe voltage Vc is then maintained due to the blocking action of thediode D preventing the capacitor C I from discharging and no otherdischarge path being provided for the capacitor C l. The peak voltageV'c, which is proportional to the peak amplitudes of the voltages Va andVb, is maintained until the predetermined relationship is reached in acomparison stage as shown in FIG. I.

The comparison stage includes a transistor 01 and transistor 02 of a PNPtype, with voltage Vc being applied to the base of NPN type transistor01 via a diode D6 which is connected from anode to cathode,respectively, between the point C and the base of the transistor 01.

The other quantity to be compared is the instantaneous value of thewaveform Vb which is applied to the emitter electrode of the transistor01 through three diodes D7, D8 and D9 which are connected in series fromanode to cathode between the point B and the emitter of the transistorQl. The three diodes D7, D8 and D9 are utilized to compensate for thetwo diode forward voltage drops due to the diodes D5 and D6 and thebase-emitter junction drop of the transistor QI. Thus the comparisonbetween the detected peak voltage Vc and the instantaneous voltage Vawill have the same number of forward junction drops as seen at theemitter of the transistor QI.

A resistor R3 is connected between the emitter of the transistor, 01 andthe point G. A separate power supply E is provided for the comparisonstage having its positive output connected to the emitter electrode ofthe transistor 02 which was of the PNP type and the negative terminal ofthe power supply E connected to the emitter of the transistor 01, sothat a voltage V+ is established between the emitter of the transistor02 and the emitter of the transistor CI. The power supply E provides theVoltage V+ completely independent of the sensed voltage Va; thus thecomparison stage including the transistor 01 and Q2 never sees more thanthe voltage V+ acting as its operating potential which may be of arelatively low value, for example, +24 volts. On the other hand, themagnitude of the sensed voltage Va is limited only by the voltageratings of the diodes D1, D2, D3 and D4 in the full wave rectifierbridge, and diodes D5 and D6. Since diodes with voltage ratings inexcess of 600 volts are presently available on the market, the voltageVa may have an RMS value of 400 volts or higher if such diodes are usedin the circuitry of FIG. I.

In the comparison stage the peak detector voltage We is supplied via thediode D6 to the base of the transistor 01 and compared with theinstantaneous value of the voltage wavefonn Vb at the emitter of thetransistor 01. When the instantaneous value of the voltage Vb dropsbelow the peak detected value Vc, the base-emitterjunction of thetransistor 01 will be forward biased and the transistor will begin toconduct. Considering the first half cycle on the curves of FIG. 2, thefirst half cycle of the waveform Va has a peak magnitude V'al causing apeak magnitude V'bl for the full wave rectified waveform Vb.According tothe setting on the potentiometer P1, the voltage across the resistor R2is peak detected via the diode D5 and capacitor C1 so that a peakvoltage V'cl appears across the capacitor C after 0 of the first halfcycle. The voltage Vcl will continue to be applied via the diode D6 tothe base of the transistor Q1 until a phase angle 0 from the beginningof the half cycle is reached. The voltage Vb applied to the emitter ofthe transistor Q1 through the diodes D7, D8 and D9, however, decreasesafter 0 90and at the angle 01 the magnitude of this voltage is smallerthan the voltage V'cl applied to the base of the transistors 01. Thusthe transistor Q1 begins to conduct. The transistors 01 and Q2 form anAC coupled regenerative PNP-NPN circuit with a resistor R4 beingconnected between the base and collector electrodes of the transistors02 and 01, respectively and with a resistor R5 connected in series witha capacitor C2 between the collector and base of the transistors Q2 and()1, respectively. As the transistor 01 begins to conduct the transistorQ2 also begins to conduct since the base electrode thereof is connectedto the collector of the transistor 01 via the resistor R4. Thus,additional base current is supplied to the transistor 01 through theemitter-collector circuit of transistor 02 from the V= voltage source Ethrough the resistor R5 and the capacitor C2 to the base of thetransistor 01. This additional current causes the transistor 01 to bedriven more heavily into conduction. The regenerative action continuessince as the transistor Q1 becomes more conductive the base of thetransistor Q2 being coupled to the collector of the transistor 01 isdriven to a lower voltage so that the transistor Q2 becomes more heavilyconductive and supplies more current in turn to the base of thetransistor 01. Thus, a pulse output is provided from the collector ofthe transistor 01 a very short time after the predetermined comparisonof the instantaneous value of the voltage Vb and the peak detected valueV'cl at the angle 01 to supply an output pulse voltage Vdl at the pointD which is supplied to a flip-flop F.

The capacitor Cl is discharged through the-base-emitter circuit of thetransistor 01 and the resistor R3, with the the transistor 01 and aresistor R7 connected between the emitter and base of the transistor 01.The comparison circuit is thus now reset for the next half cycle 'ofoperation.

The flip-flop F is operative to provide output pulses alternately fromoutputs Fl and F2 in response to an input applied at the point D. Assumethat, prior to the generation of the pulse V'dI that the flip-flop F wasin its FI output state so that gate drive had been supplied from its Floutput through an SI driver and an S4 driver to the respective gateelectrodes of the controlled rectifier pair SlS4 rendering this pairconductive during the first half cycle of operation as described withreference to FIG. 2. When the pulse V'dI is applied to the input of theflip-flop 'F,it changes output states to supply an output pulse at itsF2 output, which is applied to an S2 and 83 driver for supplying gatedrive pulses to the controlled rectifier pair S2S3 thereby turning onthese devices. The controlled rectifier pair SI-S4 is commutated oh" bythe reverse bias applied thereacross from the capacitor Cz.-With thecontrolled pair 82-83 turned on, the inverter is now set for the nexthalf cycle of operation with. the current being supplied to the load 2in an opposite direction to the previous half cycle.

For purpose of illustration assume that the next half cycle as shown incurve A of FIG. 2 has a negative peak magnitude V'a2 which is of a lowermagnitude than the peak magnitude Val of the previous half cycle but ofthe same frequency. The second half cycle is rectified in the full waverectifier via the diodes DID4 and appears at the point B in FIG. I asthe waveform of curve B of FIG. 2 having a peak magnitude Vb2. A portionof this waveform is peak detected to supply the voltage waveform asshown in curve C of FIG. 2 having a peak magnitude V'c2 which is of alower magnitude than the preceding half cycle peak magnitude V'cl. Thepeak value V'c2 is compared with the instantaneous value Vb of thesecond half cycle as shownin curve B of FIG. 2, and, when'theinstantaneous value drops below the peak value ,V'c2, the transistor Q1will begin to conduct. Under the regenerative action of the transistorQ2, the transistor QI will be turned on very rapidly to supply anoutput. pulse V'd2 as shown in curve D of FIG. 2 at-a phase angledelay-62 measured from the beginning of that half cycle. Eventhough thepeak magnitude V'c2 is smaller than the first half cycle peak magnitudeV'cl, angle 02 will be equal to the angle 61. This can be seen in thatthe transistor O1 is rendered conductive when the voltage at its emitterwith respect to the base'is at apredetermined relationship independentof the instantaneous magnitude of thesensed waveform Va. Thus the outputpulse Vd2 generated at the same phase angle delay aswasthe pulse Vdlwith respect to the corresponding beginning of each of the half cycles.

In response to the pulse V'dl'being generated, the flip-flop F revertsto its Fl output stage to supply output pulses therefrom to the S1 andS2 drivers, respectively, to gate on the the full wave rectifiedwaveform appearing between the points B and G of FIG. .I will be doubledand is illustrated as the peak voltage V'b3 in curve B of FIG; 2. Aportion of the waveform Vb drops below the value V'c3 which occurs at aphase angle 03.

A pulse I413 is generated at the time the phase angle 63 as illustratedin curve D of FIG. 2. The angle 03 is equal in degrees from thebeginning of that half cycle to the angles and 62 since the transistor01 began to conduct when the same relationship is established betweenthe base and emitter electrodes thereof, which is constant. That is,what is compared is the instantaneous value of the sinusoid to its peakmagnitude which is a constant for a selected phase angle. Thus, eventhough the output pulse V113 is generated sooner on a time base than thepulses V4! and K13 from the beginning of the respective half cycles, itis generated at the same phase angle delay from the beginning of therespective half cycles even though the frequency of the third half cycleis double that of the previous two half cycles.

The output pulse Vtfl is supplied to the flip-flop F switching theoutput state thereof to its F2 output with this pulse being applied tothe S2 and S3 drivers which in turn gate on the controlled rectifierpair S2S3. The controlled rectifier pair S1- --S4 is commutated off, andthe inverteris reset for the next half cycle of operation.

During subsequent half cycles output pulses will be supplied by thecomparator transistor Q1 after the same phase angle delay measured fromthe beginning of the respective half cycle independent of the amplitudeor frequency of the sensed voltage Va. The amplitude range over whichthe circuitry of FIG. I is operative is the order of a 100:] in that themaximum amplitude of voltage Va that can be sensed is limited only bythe power ratings of the bridge diodes D1, D2, D3 and D4. The use of thepower supply E which supplies its output voltage V+ independent of thevoltage Va permits the sensing of the high voltage levels for thevoltage Va. The minimum voltage level that may be sensed is limited bythe voltage at which the forward diode drops the diodes D5 and D6 inseries with the base of the transistor Ql become an appreciable fractionof the sensed voltage. As to the range of frequencies over which thedescribed pulse generating circuitry is operative, the upper frequencyis limited by the time constant which will permit the charging of thecapacitor C1 to substantially peak amplitude during each half cycle, andat the lower frequency end is limited by the leakage from the capacitorC1 subsequent to the peak detection.

The pulse-generating circuit for generating a pulse at a fixed phaseangle independent of frequency and amplitude of the voltage being sensedhas been described'as being incorporated into induction heatingapparatus. However, it should be understood that the circuitry could beused in many other applications requiring the generation of pulses orunder indications at a fixed or selected phase angle delay for controlor other purpose and wherein the amplitude of the sensed voltage mayvary over wide ranges. 7

Although the present invention has been described with a certain degreeof particularity, it should be understood that the present disclosurehas been made only by way of example putting a peak magnitude V'b3 ispeak detected ,to supply a voltage having a peak magnitude Vc3 asillustrated in curve C of FIG. 2. The peak magnitude V'c3 is suppliedvia the diode D6 to the base of the transistor 01 and the instantaneousvalue at this time is supplied through the diodes D7, D8 and D9 to theemitter of the transistor, QI, with the transistor 01 and that numerouschanges in the details of construction and the combination arrangementof parts, elements and components can be resorted to without departingfrom the scope and the spirit of the present invention.

We claim:

1. A circuit for providing an output signal at a selected phase anglewith respect to an alternating signal which may vary in amplitude andfrequency comprising:

detecting means for providing a detected signal proportional to thesubstantial peak magnitude of said alternating signal and in phase withsaid alternating signal; comparison means;

a power supply for applying operating potential to said comparison meansindependent of said alternating voltage; first means for applying theinstantaneous value of said alternating signal to a first input of saidcomparison means; second means for applying said detected signal to asecond input of said comparison means; and

said comparison means being operative to provide said output signal froman output thereof when said instantaneous value and said detected signalbear a predetermined relationship with respect to each other.

2. The circuit of claim I wherein:

said detected signal being proportional to the substantial peakmagnitude of each half cycle of said alternating signal; and

said comparison means being operative to provide said output signalduring each half cycle at said selected phase angle after the peakmagnitude has been reached and said predetermined relationship exists.

3. The circuit of claim 2 wherein: said comparison means including aswitching device having a plurality of electrodes, said first and secondinputs being first and second electrodes of said switching device,respectively, and said output being a third electrode thereof.

4. The circuit of claim 3 wherein said switching device comprising afirst transistor and said predetermined condition being established whensaid instantaneous value drops below the amplitude of said detectedsignal.

5. The circuit of claim 4 wherein said comparison means including asecond transistor being connected in a regenerative circuit relationshipwith said first transistor so that said first transistor provides saidoutput signal rapidly in response to said predetermined relationshipbeing established.

6. The circuit of claim 4 wherein said detecting means including acapacitor for storing said detecting signal and a first unidirectionaldevice for maintaining said detected signal magnitude until saidpredetermined relationship exists.

devices operatively connected in series between said means for full waverectifying and said second electrode for compensating for the voltagedrops across said first and second unidirectional devices and thejunction drop of said first transistor.

9. ln induction heating apparatus utilizing an inverter having aplurality of controlled switching devices for supplying an alternatingsignal to a tuned load. the combination of:

1. means for sensing said alternating signal developed across said load;

2. a pulse-generating circuit for providing an output signal at aselected phase angle with respect to said alternating signal andcomprising:

a. detecting means for providing a detected signal proportional to thesubstantial peak magnitude of said alternating signal and in phase withsaid alternating signal;

a comparison stage;

c. a power supply for supplying operating potential to said comparisonstage independent of said alternating voltage;

d. first means for applying the instantaneous value of said alternatingsignal to a first input of said comparison stage;

e. second means for applying said detected signal to a second input ofsaid comparison stage;

said comparison stage being operative to provide said output signal froman output thereof when said instantaneous value and said detected signalbear a predetermined relationship with respect to each other; and

3. means for utilizing said output pulse from said pulse generatincircuit for controllin the switched state of said plura ity ofcontrolled switc ing devices of said inverter.

10. The combination of claim 9 wherein:

said detected signal being proportional to the substantial peakmagnitude of each half cycle of said alternating signal, and

said comparison stage being operative to provide said output signalduring each half cycle at said selected phase angle after the peakmagnitude has been reached and said predetermined relationship exists.

1. A circuit for providing an output signal at a selected phase anglewith respect to an alternatiNg signal which may vary in amplitude andfrequency comprising: detecting means for providing a detected signalproportional to the substantial peak magnitude of said alternatingsignal and in phase with said alternating signal; comparison means; apower supply for applying operating potential to said comparison meansindependent of said alternating voltage; first means for applying theinstantaneous value of said alternating signal to a first input of saidcomparison means; second means for applying said detected signal to asecond input of said comparison means; and said comparison means beingoperative to provide said output signal from an output thereof when saidinstantaneous value and said detected signal bear a predeterminedrelationship with respect to each other.
 2. The circuit of claim 1wherein: said detected signal being proportional to the substantial peakmagnitude of each half cycle of said alternating signal; and saidcomparison means being operative to provide said output signal duringeach half cycle at said selected phase angle after the peak magnitudehas been reached and said predetermined relationship exists.
 2. apulse-generating circuit for providing an output signal at a selectedphase angle with respect to said alternating signal and comprising: a.detecting means for providing a detected signal proportional to thesubstantial peak magnitude of said alternating signal and in phase withsaid alternating signal; b. a comparison stage; c. a power supply forsupplying operating potential to said comparison stage independent ofsaid alternating voltage; d. first means for applying the instantaneousvalue of said alternating signal to a first input of said comparisonstage; e. second means for applying said detected signal to a secondinput of Said comparison stage; said comparison stage being operative toprovide said output signal from an output thereof when saidinstantaneous value and said detected signal bear a predeterminedrelationship with respect to each other; and
 3. The circuit of claim 2wherein: said comparison means including a switching device having aplurality of electrodes, said first and second inputs being first andsecond electrodes of said switching device, respectively, and saidoutput being a third electrode thereof.
 3. means for utilizing saidoutput pulse from said pulse generating circuit for controlling theswitched state of said plurality of controlled switching devices of saidinverter.
 4. The circuit of claim 3 wherein said switching devicecomprising a first transistor and said predetermined condition beingestablished when said instantaneous value drops below the amplitude ofsaid detected signal.
 5. The circuit of claim 4 wherein said comparisonmeans including a second transistor being connected in a regenerativecircuit relationship with said first transistor so that said firsttransistor provides said output signal rapidly in response to saidpredetermined relationship being established.
 6. The circuit of claim 4wherein said detecting means including a capacitor for storing saiddetecting signal and a first unidirectional device for maintaining saiddetected signal magnitude until said predetermined relationship exists.7. The circuit of claim 6 including: means for full wave rectifying saidalternating signal; and means for supplying a selected portion of thefull wave rectified signal to said detecting means, said means forsupplying being adjustable to vary said selected phase angle.
 8. Thecircuit of claim 7 wherein: said first means including a secondunidirectional device for isolating said power supply from saiddetecting means and being operatively connected in series between saidfirst unidirectional device and said first electrode; and said secondmeans including a plurality of unidirectional devices operativelyconnected in series between said means for full wave rectifying and saidsecond electrode for compensating for the voltage drops across saidfirst and second unidirectional devices and the junction drop of saidfirst transistor.
 9. In induction heating apparatus utilizing aninverter having a plurality of controlled switching devices forsupplying an alternating signal to a tuned load, the combination of: 10.The combination of claim 9 wherein: said detected signal beingproportional to the substantial peak magnitude of each half cycle ofsaid alternating signal, and said comparison stage being operative toprovide said output signal during each half cycle at said selected phaseangle after the peak magnitude has been reached and said predeterminedrelationship exists.